Semiconductor Engineering

Insights Into Advanced DRAM Capacitor Patterning: Process Window Evaluation Using Virtual Fabrication

With continuous device scaling, process windows have become narrower and narrower due to smaller feature sizes and greater process step variability [1]. A key task during the R&D stage of ...
EDN

MagnaChip to Include Specialty High Density Capacitor Processes With Its Standard CMOS Mixed Signal Process

The high density metal-insulator-metal capacitor process provides capacitance values of 4, 6, 8, and 10fF/um(2). This process replaces the industry standard silicon nitride insulator layer with a high ...