EDN

Micron Shrinks DRAM Process Technology, Achieving the World’s Smallest 1 Gigabit DDR2 Memory Chip

Micron Technology, Inc., has announced production sampling of its new 1Gb DDR2 device fabricated on 68-nanometer (nm) DRAM process technology. The new process, coupled with Micron’s 6F² technology, ...
Semiconductor Engineering

Understanding and Mitigating Column-Based Read Disturbance in DRAM Chips (ETH Zurich, CISPA)

A new technical paper titled “ColumnDisturb: Understanding Column-based Read Disturbance in Real DRAM Chips and Implications for Future Systems” was published by researchers at ETH Zurich and CISPA.
Semiconductor Engineering

Smaller Geometries, Bigger Demands: The Role Of OCD In GAA Logic And Vertical Gate DRAM Process Control

AI workloads are pushing the boundaries of compute, memory, and interconnect architectures, and to meet these goals, manufacturers are rapidly accelerating advanced logic and DRAM development. Chief ...
TechSpot

Ten former Samsung employees charged over DRAM technology leak to China

What just happened? The Seoul Central District Prosecutors' Office has indicted 10 former Samsung Electronics employees for violating South Korea's Industrial Technology Protection Act, which ...
TweakTown

SK hynix ramps 1c DRAM to 6 EUV layers, preps for High-NA EUV designs to destroy Samsung in HBM

TL;DR: SK hynix is advancing its next-generation 1c DRAM using over five EUV layers, enhancing 16Gb DDR5 DRAM production with planned investments starting late 2024. The company is also preparing for ...